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(parent: 1fd1177) | patch
drm/radeon: implement clock and power gating for CIK (v3)
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 23 Jul 2013 13:41:05 +0000 (09:41 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Aug 2013 20:30:08 +0000 (16:30 -0400)
commit22c775ce80ed921fe9490f3cc2ca66dcda44f572
tree5c330689c876b94c34857feefdac1b2cbb27cbc3tree | snapshot
parent1fd11777c2f0e6b6b37432b984bf40e3c6072f23commit | diff
drm/radeon: implement clock and power gating for CIK (v3)

Only the APUs support power gating.

v2: disable cgcg for now
v3: workaround hw issue in mgcg

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/cik.c diff | blob | blame | history
drivers/gpu/drm/radeon/cikd.h diff | blob | blame | history
drivers/gpu/drm/radeon/clearstate_ci.h [new file with mode: 0644] blob
drivers/gpu/drm/radeon/evergreen.c diff | blob | blame | history
drivers/gpu/drm/radeon/radeon.h diff | blob | blame | history
drivers/gpu/drm/radeon/radeon_asic.c diff | blob | blame | history
drivers/gpu/drm/radeon/si.c diff | blob | blame | history
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