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(parent: a242ef4) | patch
drm/msm/adreno: Disable IFPC when sysprof is active
authorAkhil P Oommen <akhilpo@oss.qualcomm.com>
Mon, 8 Sep 2025 08:27:06 +0000 (13:57 +0530)
committerRob Clark <robin.clark@oss.qualcomm.com>
Mon, 8 Sep 2025 14:25:00 +0000 (07:25 -0700)
commit62cd0fa6990b03d6618e9031d926a2f672a3d801
tree1cc249553e6eb67d7b8b413b5878d37aa4b69bbdtree | snapshot
parenta242ef4a7577bfd3dbf0b4fb7bf92adca145b0c1commit | diff
drm/msm/adreno: Disable IFPC when sysprof is active

Moving to IFPC state clears the 'Perfcounter Select' register setup
by the userspace. So, lets block the IFPC when sysprof is active by
using the perfcounter oob signal to the GMU.

Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/673380/
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
drivers/gpu/drm/msm/adreno/a6xx_gmu.c diff | blob | blame | history
drivers/gpu/drm/msm/adreno/a6xx_gmu.h diff | blob | blame | history
drivers/gpu/drm/msm/adreno/a6xx_gpu.c diff | blob | blame | history
drivers/gpu/drm/msm/adreno/a6xx_gpu.h diff | blob | blame | history
drivers/gpu/drm/msm/msm_gpu.h diff | blob | blame | history
drivers/gpu/drm/msm/msm_submitqueue.c diff | blob | blame | history
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