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(parent: 085292c) | patch
drm/amdgpu: add mode2 reset for sienna_cichlid
authorVictor Zhao <Victor.Zhao@amd.com>
Thu, 28 Jul 2022 02:44:47 +0000 (10:44 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 16 Aug 2022 22:14:31 +0000 (18:14 -0400)
commit672c0218e3e22ccaeb2911da8d3b784d3b6cc1d8
tree10c93731efc1b0909cee67a0b34c9780df70565btree | snapshot
parent085292c3d78015412b752ee1ca4c7725fd2bf2fccommit | diff
drm/amdgpu: add mode2 reset for sienna_cichlid

To meet the requirement for multi container usecase which needs
a quicker reset and not causing VRAM lost, adding the Mode2
reset handler for sienna_cichlid.

v2: move skip mode2 flag part separately

v3: remove the use of asic_reset_res

Signed-off-by: Victor Zhao <Victor.Zhao@amd.com>
Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/Makefile diff | blob | blame | history
drivers/gpu/drm/amd/amdgpu/amdgpu_reset.c diff | blob | blame | history
drivers/gpu/drm/amd/amdgpu/sienna_cichlid.c [new file with mode: 0644] blob
drivers/gpu/drm/amd/amdgpu/sienna_cichlid.h [new file with mode: 0644] blob
drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v11_0_7_ppsmc.h diff | blob | blame | history
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h diff | blob | blame | history
drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c diff | blob | blame | history
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