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clk: renesas: r8a779g0: Add VSPX clocks
authorJacopo Mondi <jacopo.mondi+renesas@ideasonboard.com>
Fri, 20 Dec 2024 09:14:40 +0000 (10:14 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 7 Jan 2025 16:00:56 +0000 (17:00 +0100)
commit7088d2d7e9a58a972d8c07b4d74837f3c524f2f4
tree26b9c6825d76a6067416fbb90ed1d73255fac84btree | snapshot
parentc5a870087827bcf83cb06758d3e3b547790a6ad8commit | diff
clk: renesas: r8a779g0: Add VSPX clocks

Add the VSPX modules clock for Renesas R-Car V4H (R8A779G0) SoC.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Jacopo Mondi <jacopo.mondi+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20241220-rcar-v4h-vspx-v4-3-7dc1812585ad@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a779g0-cpg-mssr.c diff | blob | blame | history
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