]> Gentwo Git Trees - linux/.git/commit
riscv: dts: starfive: jh7110: add DMC memory controller
authorE Shattow <e@freeshell.de>
Sat, 23 Aug 2025 10:01:42 +0000 (03:01 -0700)
committerConor Dooley <conor.dooley@microchip.com>
Thu, 4 Sep 2025 17:57:30 +0000 (18:57 +0100)
commit7114969021ec5c4c0f3df1da3a8790f75dda92e2
tree10ce4eddc395a7b8c395a1c5d833b4f9721e2cf3
parentf5e36ecc9e4a2a4bcd942ad1e9947e018ffd15b5
riscv: dts: starfive: jh7110: add DMC memory controller

Add JH7110 SoC DDR external memory controller.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/starfive/jh7110.dtsi