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(parent: 3f44344) | patch
clk: imx: imx8mq: mark sys1/2_pll as fixed clock
authorPeng Fan <peng.fan@nxp.com>
Thu, 24 Oct 2019 01:58:47 +0000 (01:58 +0000)
committerShawn Guo <shawnguo@kernel.org>
Fri, 25 Oct 2019 09:07:08 +0000 (17:07 +0800)
commit7858d31beffe178b0e775f13af1917ac60273112
tree9c2a5cce32d49d1f5f33bd0abc9a6f6907e280datree | snapshot
parent3f44344868cfcd76b2ca0fe334a76a17a120cdd9commit | diff
clk: imx: imx8mq: mark sys1/2_pll as fixed clock

According Architecture definition guide, SYS1_PLL is fixed at
800MHz, SYS2_PLL is fixed at 1000MHz, so let's use imx_clk_fixed
to register the clocks and drop code that could change the rate.

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/clk/imx/clk-imx8mq.c diff | blob | blame | history
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