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(parent: b478f20) | patch
drm/i915: move hpll and czclk caching under display
authorJani Nikula <jani.nikula@intel.com>
Fri, 12 Sep 2025 14:48:53 +0000 (17:48 +0300)
committerJani Nikula <jani.nikula@intel.com>
Wed, 17 Sep 2025 08:29:34 +0000 (11:29 +0300)
commit869d0e96398dca38862b3263244415a05d8a4cf1
treee2db64cc6c7198941e8795bd39cd743772ffd3e4tree | snapshot
parentb478f2035c59fa81c4bdc0ddefbf692b2797676acommit | diff
drm/i915: move hpll and czclk caching under display

Perhaps not the ideal place, but better than having to have the fields
in both struct drm_i915_private and struct xe_device.

v2: Rebase

Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> # v1
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/cbca9b13f2235a624a21bf7617ffe763e25c848c.1757688216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_display.c diff | blob | blame | history
drivers/gpu/drm/i915/display/intel_display_core.h diff | blob | blame | history
drivers/gpu/drm/i915/i915_drv.h diff | blob | blame | history
drivers/gpu/drm/xe/xe_device_types.h diff | blob | blame | history
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