]> Gentwo Git Trees - linux/.git/commit
clk: renesas: r9a09g057: Add CA55 core clocks
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Wed, 18 Sep 2024 13:59:57 +0000 (14:59 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 7 Oct 2024 08:32:56 +0000 (10:32 +0200)
commit8cce33aed0b6383e91bb9d26dae11b1293101381
treeaf2e04c749289acf305d227ea2eb1d526393e545
parent29cb4974a79bd8e380f2044811698aa2f4fc4e6d
clk: renesas: r9a09g057: Add CA55 core clocks

Add CA55 core clocks which are derived from PLLCA55.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240918135957.290101-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r9a09g057-cpg.c
drivers/clk/renesas/rzv2h-cpg.h