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riscv: Introduce Zalasr instructions
authorXu Lu <luxu.kernel@bytedance.com>
Mon, 20 Oct 2025 04:20:50 +0000 (12:20 +0800)
committerPaul Walmsley <pjw@kernel.org>
Wed, 19 Nov 2025 16:19:28 +0000 (09:19 -0700)
commitad1bb4b8525e497c95d48a2d3fd2e81fba4b5ad7
tree53e5f30c347f2659134d0ea08dccf9b4434303f7tree | snapshot
parentf4922b69165735e81752ee47d174f873e989a449commit | diff
riscv: Introduce Zalasr instructions

Introduce l{b|h|w|d}.{aq|aqrl} and s{b|h|w|d}.{rl|aqrl} instruction
encodings.

Signed-off-by: Xu Lu <luxu.kernel@bytedance.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Link: https://patch.msgid.link/20251020042056.30283-5-luxu.kernel@bytedance.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
arch/riscv/include/asm/insn-def.h diff | blob | blame | history
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