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(parent: bf12bc4) | patch
ice: remove ice_tspll_params_e825 definitions
authorKarol Kolacinski <karol.kolacinski@intel.com>
Thu, 1 May 2025 22:54:15 +0000 (15:54 -0700)
committerTony Nguyen <anthony.l.nguyen@intel.com>
Wed, 18 Jun 2025 15:59:23 +0000 (08:59 -0700)
commitb14b2d076ce833ff5e55352f13b9e6213867f38b
tree3fcefceda85f1bfc8328a7166508a951720ec1b8tree | snapshot
parentbf12bc439407e27f4dcfbbb40edec6278e1ad13acommit | diff
ice: remove ice_tspll_params_e825 definitions

Remove ice_tspll_params_e825 definitions as according to EDS (Electrical
Design Specification) doc, E825 devices support only 156.25 MHz TSPLL
frequency for both TCXO and TIME_REF clock source.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
drivers/net/ethernet/intel/ice/ice_tspll.c diff | blob | blame | history
drivers/net/ethernet/intel/ice/ice_tspll.h diff | blob | blame | history
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