arm64: dts: exynosautov920: add CPU cache information
Add CPU caches information to its dt nodes so that the same is
available to userspace via sysfs. This SoC has 64/64 KB I/D cache and
256KB of L2 cache for each core, 2 MB of shared L3 cache for each quad
cpu cluster and 1 MB of shared L3 cache for the dual cpu cluster.
Signed-off-by: Devang Tailor <dev.tailor@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20250108055012.1938530-1-dev.tailor@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
gentwo / linux / .git / commit