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(parent: fca0c66) | patch
drm/amd/pm/powerplay/smumgr: Fix PCIeBootLinkLevel value on Fiji
authorJohn Smith <itistotalbotnet@gmail.com>
Tue, 21 Oct 2025 09:08:13 +0000 (11:08 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 28 Oct 2025 13:49:58 +0000 (09:49 -0400)
commitc52238c9fb414555c68340cd80e487d982c1921c
treec08c4b6cd18461190d388d9a27aee121880caf59tree | snapshot
parentfca0c66b22303de0d1d6313059baf4dc960a4753commit | diff
drm/amd/pm/powerplay/smumgr: Fix PCIeBootLinkLevel value on Fiji

Previously this was initialized with zero which represented PCIe Gen
1.0 instead of using the
maximum value from the speed table which is the behaviour of all other
smumgr implementations.

Fixes: 18edef19ea44 ("drm/amd/powerplay: implement fw image related smu interface for Fiji.")
Signed-off-by: John Smith <itistotalbotnet@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/powerplay/smumgr/fiji_smumgr.c diff | blob | blame | history
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