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(parent: 5105c80) | patch
drm/i915/wm: Refactor dpkgc value prepration
authorSuraj Kandpal <suraj.kandpal@intel.com>
Tue, 3 Dec 2024 08:47:02 +0000 (14:17 +0530)
committerSuraj Kandpal <suraj.kandpal@intel.com>
Thu, 5 Dec 2024 03:34:29 +0000 (09:04 +0530)
commitd4e8379ba2aabfa7c2697e32ed5ad3bad4a8e392
tree2c95864613db7457d9192a46e1af5409d01051d9tree | snapshot
parent5105c803295e4c2004aad518713208fae42bfc33commit | diff
drm/i915/wm: Refactor dpkgc value prepration

Refactor the value getting prepped to be written into the PKG_C_LATENCY
register by ORing the REG_FIELD_PREP values instead of having val
getting operated on twice.
We dont need the clear and val variables to be initialized.

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241203084706.2126189-2-suraj.kandpal@intel.com
drivers/gpu/drm/i915/display/skl_watermark.c diff | blob | blame | history
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