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ACPICA: Complete CXL 3.0 CXIMS structures
authorZhang Rui <rui.zhang@intel.com>
Wed, 20 Mar 2024 05:15:08 +0000 (13:15 +0800)
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>
Thu, 29 Aug 2024 15:31:25 +0000 (17:31 +0200)
commitff418f34ba44d8ff6cea953dd79546f3e4c6c807
tree88fe1341b07cf4e5f00bd034d261203a9dfd2c9etree | snapshot
parent7afea7bc49c5482ac11fc4488230827edc51e28acommit | diff
ACPICA: Complete CXL 3.0 CXIMS structures

ACPICA commit eb2a2ff303416fb3f6c425d519dbcd6988dbd91f

Commit 2d8dc0383d3c9 ("Add CXL 3.0 structures (CXIMS & RDPAS) to the
CEDT table") introduces basic support for CXL XOR Interleave Math
Structure (CXIMS).

Complete the CXIMS structures.

No functional change.

Link: https://github.com/acpica/acpica/commit/eb2a2ff3
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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