]> Gentwo Git Trees - linux/.git/commitdiff
ARM: dts: microchip: sama7d65: Add DMAs to sama7d65 SoC
authorRyan Wanner <Ryan.Wanner@microchip.com>
Fri, 14 Feb 2025 18:08:20 +0000 (11:08 -0700)
committerClaudiu Beznea <claudiu.beznea@tuxon.dev>
Mon, 24 Feb 2025 10:14:45 +0000 (12:14 +0200)
Add DMAs to the SAMA7D65 SoC device tree.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/78da4125a991c6f4081fce78825f1f983091e0f5.1739555984.git.Ryan.Wanner@microchip.com
[claudiu.beznea: dropped extra space in reg property of dma0]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
arch/arm/boot/dts/microchip/sama7d65.dtsi

index f321f6b7ded405f99efd5654c05a127185a1319a..92a5347e35b598836b5a327f8ad48ddc4df89656 100644 (file)
@@ -9,6 +9,7 @@
  */
 
 #include <dt-bindings/clock/at91.h>
+#include <dt-bindings/dma/at91.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
@@ -88,6 +89,17 @@ chipid@e0020000 {
                        reg = <0xe0020000 0x8>;
                };
 
+               dma2: dma-controller@e1200000 {
+                       compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
+                       reg = <0xe1200000 0x1000>;
+                       interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
+                       clock-names = "dma_clk";
+                       dma-requests = <0>;
+                       status = "disabled";
+               };
+
                sdmmc1: mmc@e1208000 {
                        compatible = "microchip,sama7d65-sdhci", "microchip,sam9x60-sdhci";
                        reg = <0xe1208000 0x400>;
@@ -100,6 +112,26 @@ sdmmc1: mmc@e1208000 {
                        status = "disabled";
                };
 
+               dma0: dma-controller@e1610000 {
+                       compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
+                       reg = <0xe1610000 0x1000>;
+                       interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
+                       clock-names = "dma_clk";
+                       status = "disabled";
+               };
+
+               dma1: dma-controller@e1614000 {
+                       compatible = "microchip,sama7d65-dma", "microchip,sama7g5-dma";
+                       reg = <0xe1614000 0x1000>;
+                       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+                       #dma-cells = <1>;
+                       clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
+                       clock-names = "dma_clk";
+                       status = "disabled";
+               };
+
                pit64b0: timer@e1800000 {
                        compatible = "microchip,sama7d65-pit64b", "microchip,sam9x60-pit64b";
                        reg = <0xe1800000 0x100>;