//! Simple DMA object wrapper.
-use core::ops::{Deref, DerefMut};
-
-use kernel::device;
-use kernel::dma::CoherentAllocation;
-use kernel::page::PAGE_SIZE;
-use kernel::prelude::*;
+use core::ops::{
+ Deref,
+ DerefMut, //
+};
+
+use kernel::{
+ device,
+ dma::CoherentAllocation,
+ page::PAGE_SIZE,
+ prelude::*, //
+};
pub(crate) struct DmaObject {
dma: CoherentAllocation<u8>,
// SPDX-License-Identifier: GPL-2.0
use kernel::{
- auxiliary, c_str,
+ auxiliary,
+ c_str,
device::Core,
pci,
- pci::{Class, ClassMask, Vendor},
+ pci::{
+ Class,
+ ClassMask,
+ Vendor, //
+ },
prelude::*,
sizes::SZ_16M,
- sync::Arc,
+ sync::Arc, //
};
use crate::gpu::Gpu;
//! Falcon microprocessor base support
use core::ops::Deref;
+
use hal::FalconHal;
-use kernel::device;
-use kernel::dma::DmaAddress;
-use kernel::io::poll::read_poll_timeout;
-use kernel::prelude::*;
-use kernel::sync::aref::ARef;
-use kernel::time::delay::fsleep;
-use kernel::time::Delta;
-
-use crate::dma::DmaObject;
-use crate::driver::Bar0;
-use crate::gpu::Chipset;
-use crate::regs;
-use crate::regs::macros::RegisterBase;
+
+use kernel::{
+ device,
+ dma::DmaAddress,
+ io::poll::read_poll_timeout,
+ prelude::*,
+ sync::aref::ARef,
+ time::{
+ delay::fsleep,
+ Delta, //
+ },
+};
+
+use crate::{
+ dma::DmaObject,
+ driver::Bar0,
+ gpu::Chipset,
+ regs,
+ regs::macros::RegisterBase, //
+};
pub(crate) mod gsp;
mod hal;
use crate::{
driver::Bar0,
- falcon::{Falcon, FalconEngine, PFalcon2Base, PFalconBase},
- regs::{self, macros::RegisterBase},
+ falcon::{
+ Falcon,
+ FalconEngine,
+ PFalcon2Base,
+ PFalconBase, //
+ },
+ regs::{
+ self,
+ macros::RegisterBase, //
+ },
};
/// Type specifying the `Gsp` falcon engine. Cannot be instantiated.
use kernel::prelude::*;
-use crate::driver::Bar0;
-use crate::falcon::{Falcon, FalconBromParams, FalconEngine};
-use crate::gpu::Chipset;
+use crate::{
+ driver::Bar0,
+ falcon::{
+ Falcon,
+ FalconBromParams,
+ FalconEngine, //
+ },
+ gpu::Chipset,
+};
mod ga102;
use core::marker::PhantomData;
-use kernel::device;
-use kernel::io::poll::read_poll_timeout;
-use kernel::prelude::*;
-use kernel::time::Delta;
-
-use crate::driver::Bar0;
-use crate::falcon::{
- Falcon, FalconBromParams, FalconEngine, FalconModSelAlgo, PeregrineCoreSelect,
+use kernel::{
+ device,
+ io::poll::read_poll_timeout,
+ prelude::*,
+ time::Delta, //
+};
+
+use crate::{
+ driver::Bar0,
+ falcon::{
+ Falcon,
+ FalconBromParams,
+ FalconEngine,
+ FalconModSelAlgo,
+ PeregrineCoreSelect, //
+ },
+ regs,
};
-use crate::regs;
use super::FalconHal;
// SPDX-License-Identifier: GPL-2.0
-use crate::falcon::{FalconEngine, PFalcon2Base, PFalconBase};
-use crate::regs::macros::RegisterBase;
+use crate::{
+ falcon::{
+ FalconEngine,
+ PFalcon2Base,
+ PFalconBase, //
+ },
+ regs::macros::RegisterBase,
+};
/// Type specifying the `Sec2` falcon engine. Cannot be instantiated.
pub(crate) struct Sec2(());
use core::ops::Range;
-use kernel::prelude::*;
-use kernel::ptr::{Alignable, Alignment};
-use kernel::sizes::*;
-use kernel::sync::aref::ARef;
-use kernel::{dev_warn, device};
-
-use crate::dma::DmaObject;
-use crate::driver::Bar0;
-use crate::gpu::Chipset;
-use crate::regs;
+use kernel::{
+ device,
+ prelude::*,
+ ptr::{
+ Alignable,
+ Alignment, //
+ },
+ sizes::*,
+ sync::aref::ARef, //
+};
+
+use crate::{
+ dma::DmaObject,
+ driver::Bar0,
+ gpu::Chipset,
+ regs, //
+};
mod hal;
use kernel::prelude::*;
-use crate::driver::Bar0;
-use crate::gpu::Chipset;
+use crate::{
+ driver::Bar0,
+ gpu::Chipset, //
+};
mod ga100;
mod ga102;
// SPDX-License-Identifier: GPL-2.0
-struct Ga100;
-
use kernel::prelude::*;
-use crate::driver::Bar0;
-use crate::fb::hal::FbHal;
-use crate::regs;
+use crate::{
+ driver::Bar0,
+ fb::hal::FbHal,
+ regs, //
+};
use super::tu102::FLUSH_SYSMEM_ADDR_SHIFT;
+struct Ga100;
+
pub(super) fn read_sysmem_flush_page_ga100(bar: &Bar0) -> u64 {
u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08()) << FLUSH_SYSMEM_ADDR_SHIFT
| u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::read(bar).adr_63_40())
use kernel::prelude::*;
-use crate::driver::Bar0;
-use crate::fb::hal::FbHal;
-use crate::regs;
+use crate::{
+ driver::Bar0,
+ fb::hal::FbHal,
+ regs, //
+};
fn vidmem_size_ga102(bar: &Bar0) -> u64 {
regs::NV_USABLE_FB_SIZE_IN_MB::read(bar).usable_fb_size()
// SPDX-License-Identifier: GPL-2.0
-use crate::driver::Bar0;
-use crate::fb::hal::FbHal;
-use crate::regs;
use kernel::prelude::*;
+use crate::{
+ driver::Bar0,
+ fb::hal::FbHal,
+ regs, //
+};
+
/// Shift applied to the sysmem address before it is written into `NV_PFB_NISO_FLUSH_SYSMEM_ADDR`,
/// to be used by HALs.
pub(super) const FLUSH_SYSMEM_ADDR_SHIFT: u32 = 8;
//! to be loaded into a given execution unit.
use core::marker::PhantomData;
-use core::mem::size_of;
-use kernel::device;
-use kernel::firmware;
-use kernel::prelude::*;
-use kernel::str::CString;
-use kernel::transmute::FromBytes;
-
-use crate::dma::DmaObject;
-use crate::falcon::FalconFirmware;
-use crate::gpu;
+use kernel::{
+ device,
+ firmware,
+ prelude::*,
+ str::CString,
+ transmute::FromBytes, //
+};
+
+use crate::{
+ dma::DmaObject,
+ falcon::FalconFirmware,
+ gpu, //
+};
pub(crate) mod booter;
pub(crate) mod fwsec;
//! running on [`Sec2`], that is used on Turing/Ampere to load the GSP firmware into the GSP falcon
//! (and optionally unload it through a separate firmware image).
-use core::marker::PhantomData;
-use core::mem::size_of;
-use core::ops::Deref;
-
-use kernel::device;
-use kernel::prelude::*;
-use kernel::transmute::FromBytes;
-
-use crate::dma::DmaObject;
-use crate::driver::Bar0;
-use crate::falcon::sec2::Sec2;
-use crate::falcon::{Falcon, FalconBromParams, FalconFirmware, FalconLoadParams, FalconLoadTarget};
-use crate::firmware::{BinFirmware, FirmwareDmaObject, FirmwareSignature, Signed, Unsigned};
-use crate::gpu::Chipset;
+use core::{
+ marker::PhantomData,
+ ops::Deref, //
+};
+
+use kernel::{
+ device,
+ prelude::*,
+ transmute::FromBytes, //
+};
+
+use crate::{
+ dma::DmaObject,
+ driver::Bar0,
+ falcon::{
+ sec2::Sec2,
+ Falcon,
+ FalconBromParams,
+ FalconFirmware,
+ FalconLoadParams,
+ FalconLoadTarget, //
+ },
+ firmware::{
+ BinFirmware,
+ FirmwareDmaObject,
+ FirmwareSignature,
+ Signed,
+ Unsigned, //
+ },
+ gpu::Chipset,
+};
/// Local convenience function to return a copy of `S` by reinterpreting the bytes starting at
/// `offset` in `slice`.
//! - The command to be run, as this firmware can perform several tasks ;
//! - The ucode signature, so the GSP falcon can run FWSEC in HS mode.
-use core::marker::PhantomData;
-use core::mem::{align_of, size_of};
-use core::ops::Deref;
-
-use kernel::device::{self, Device};
-use kernel::prelude::*;
-use kernel::transmute::FromBytes;
-
-use crate::dma::DmaObject;
-use crate::driver::Bar0;
-use crate::falcon::gsp::Gsp;
-use crate::falcon::{Falcon, FalconBromParams, FalconFirmware, FalconLoadParams, FalconLoadTarget};
-use crate::firmware::{FalconUCodeDescV3, FirmwareDmaObject, FirmwareSignature, Signed, Unsigned};
-use crate::vbios::Vbios;
+use core::{
+ marker::PhantomData,
+ mem::{
+ align_of,
+ size_of, //
+ },
+ ops::Deref,
+};
+
+use kernel::{
+ device::{
+ self,
+ Device, //
+ },
+ prelude::*,
+ transmute::FromBytes,
+};
+
+use crate::{
+ dma::DmaObject,
+ driver::Bar0,
+ falcon::{
+ gsp::Gsp,
+ Falcon,
+ FalconBromParams,
+ FalconFirmware,
+ FalconLoadParams,
+ FalconLoadTarget, //
+ },
+ firmware::{
+ FalconUCodeDescV3,
+ FirmwareDmaObject,
+ FirmwareSignature,
+ Signed,
+ Unsigned, //
+ },
+ vbios::Vbios,
+};
const NVFW_FALCON_APPIF_ID_DMEMMAPPER: u32 = 0x4;
use core::mem::size_of_val;
-use kernel::device;
-use kernel::dma::{DataDirection, DmaAddress};
-use kernel::kvec;
-use kernel::prelude::*;
-use kernel::scatterlist::{Owned, SGTable};
-
-use crate::dma::DmaObject;
-use crate::firmware::riscv::RiscvFirmware;
-use crate::gpu::{Architecture, Chipset};
-use crate::gsp::GSP_PAGE_SIZE;
+use kernel::{
+ device,
+ dma::{
+ DataDirection,
+ DmaAddress, //
+ },
+ kvec,
+ prelude::*,
+ scatterlist::{
+ Owned,
+ SGTable, //
+ },
+};
+
+use crate::{
+ dma::DmaObject,
+ firmware::riscv::RiscvFirmware,
+ gpu::{
+ Architecture,
+ Chipset, //
+ },
+ gsp::GSP_PAGE_SIZE,
+};
/// Ad-hoc and temporary module to extract sections from ELF images.
///
use core::mem::size_of;
-use kernel::device;
-use kernel::firmware::Firmware;
-use kernel::prelude::*;
-use kernel::transmute::FromBytes;
+use kernel::{
+ device,
+ firmware::Firmware,
+ prelude::*,
+ transmute::FromBytes, //
+};
-use crate::dma::DmaObject;
-use crate::firmware::BinFirmware;
+use crate::{
+ dma::DmaObject,
+ firmware::BinFirmware, //
+};
/// Descriptor for microcode running on a RISC-V core.
#[repr(C)]
//!
//! Note that the devinit sequence also needs to run during suspend/resume.
-use kernel::io::poll::read_poll_timeout;
-use kernel::prelude::*;
-use kernel::time::Delta;
+use kernel::{
+ io::poll::read_poll_timeout,
+ prelude::*,
+ time::Delta, //
+};
-use crate::driver::Bar0;
-use crate::regs;
+use crate::{
+ driver::Bar0,
+ regs, //
+};
/// Wait for the `GFW` (GPU firmware) boot completion signal (`GFW_BOOT`), or a 4 seconds timeout.
///
// SPDX-License-Identifier: GPL-2.0
-use kernel::{device, devres::Devres, error::code::*, fmt, pci, prelude::*, sync::Arc};
-
-use crate::driver::Bar0;
-use crate::falcon::{gsp::Gsp as GspFalcon, sec2::Sec2 as Sec2Falcon, Falcon};
-use crate::fb::SysmemFlush;
-use crate::gfw;
-use crate::gsp::Gsp;
-use crate::regs;
+use kernel::{
+ device,
+ devres::Devres,
+ fmt,
+ pci,
+ prelude::*,
+ sync::Arc, //
+};
+
+use crate::{
+ driver::Bar0,
+ falcon::{
+ gsp::Gsp as GspFalcon,
+ sec2::Sec2 as Sec2Falcon,
+ Falcon, //
+ },
+ fb::SysmemFlush,
+ gfw,
+ gsp::Gsp,
+ regs,
+};
macro_rules! define_chipset {
({ $($variant:ident = $value:expr),* $(,)* }) =>
// SPDX-License-Identifier: GPL-2.0
-use kernel::device;
-use kernel::pci;
-use kernel::prelude::*;
-
-use crate::driver::Bar0;
-use crate::falcon::{gsp::Gsp, sec2::Sec2, Falcon};
-use crate::fb::FbLayout;
-use crate::firmware::{
- booter::{BooterFirmware, BooterKind},
- fwsec::{FwsecCommand, FwsecFirmware},
- gsp::GspFirmware,
- FIRMWARE_VERSION,
+use kernel::{
+ device,
+ pci,
+ prelude::*, //
+};
+
+use crate::{
+ driver::Bar0,
+ falcon::{
+ gsp::Gsp,
+ sec2::Sec2,
+ Falcon, //
+ },
+ fb::FbLayout,
+ firmware::{
+ booter::{
+ BooterFirmware,
+ BooterKind, //
+ },
+ fwsec::{
+ FwsecCommand,
+ FwsecFirmware, //
+ },
+ gsp::GspFirmware,
+ FIRMWARE_VERSION, //
+ },
+ gpu::Chipset,
+ regs,
+ vbios::Vbios,
};
-use crate::gpu::Chipset;
-use crate::regs;
-use crate::vbios::Vbios;
impl super::Gsp {
/// Helper function to load and run the FWSEC-FRTS firmware and confirm that it has properly
#[macro_use]
pub(crate) mod macros;
-use crate::falcon::{
- DmaTrfCmdSize, FalconCoreRev, FalconCoreRevSubversion, FalconFbifMemType, FalconFbifTarget,
- FalconModSelAlgo, FalconSecurityModel, PFalcon2Base, PFalconBase, PeregrineCoreSelect,
-};
-use crate::gpu::{Architecture, Chipset};
use kernel::prelude::*;
+use crate::{
+ falcon::{
+ DmaTrfCmdSize,
+ FalconCoreRev,
+ FalconCoreRevSubversion,
+ FalconFbifMemType,
+ FalconFbifTarget,
+ FalconModSelAlgo,
+ FalconSecurityModel,
+ PFalcon2Base,
+ PFalconBase,
+ PeregrineCoreSelect, //
+ },
+ gpu::{
+ Architecture,
+ Chipset, //
+ },
+};
+
// PMC
register!(NV_PMC_BOOT_0 @ 0x00000000, "Basic revision information about the GPU" {
//! VBIOS extraction and parsing.
-use crate::driver::Bar0;
-use crate::firmware::fwsec::Bcrt30Rsa3kSignature;
-use crate::firmware::FalconUCodeDescV3;
use core::convert::TryFrom;
-use kernel::device;
-use kernel::error::Result;
-use kernel::prelude::*;
-use kernel::ptr::{Alignable, Alignment};
-use kernel::transmute::FromBytes;
-use kernel::types::ARef;
+
+use kernel::{
+ device,
+ prelude::*,
+ ptr::{
+ Alignable,
+ Alignment, //
+ },
+ transmute::FromBytes,
+ types::ARef,
+};
+
+use crate::{
+ driver::Bar0,
+ firmware::{
+ fwsec::Bcrt30Rsa3kSignature,
+ FalconUCodeDescV3, //
+ },
+};
/// The offset of the VBIOS ROM in the BAR0 space.
const ROM_OFFSET: usize = 0x300000;
gentwo / linux / .git / commitdiff