]> Gentwo Git Trees - linux/.git/commitdiff
drm/i915/color: Add framework to program PRE/POST CSC LUT
authorUma Shankar <uma.shankar@intel.com>
Wed, 3 Dec 2025 08:52:06 +0000 (14:22 +0530)
committerJani Nikula <jani.nikula@intel.com>
Thu, 4 Dec 2025 17:43:47 +0000 (19:43 +0200)
Add framework that will help in loading LUT to Pre/Post CSC color
blocks.

v2: Add dsb support
v3: Align enum names
v4: Propagate change in lut data to crtc_state

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://patch.msgid.link/20251203085211.3663374-11-uma.shankar@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_color.c
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_plane.c

index 2f8e985d51e58dd14a73edcb9012b40120e841a4..4ca359d68730fc9f85e5ece17217162102f9adc5 100644 (file)
@@ -93,6 +93,10 @@ struct intel_color_funcs {
        /* Plane CSC*/
        void (*load_plane_csc_matrix)(struct intel_dsb *dsb,
                                      const struct intel_plane_state *plane_state);
+
+       /* Plane Pre/Post CSC */
+       void (*load_plane_luts)(struct intel_dsb *dsb,
+                               const struct intel_plane_state *plane_state);
 };
 
 #define CTM_COEFF_SIGN (1ULL << 63)
@@ -4077,11 +4081,23 @@ intel_color_load_plane_csc_matrix(struct intel_dsb *dsb,
                display->funcs.color->load_plane_csc_matrix(dsb, plane_state);
 }
 
+static void
+intel_color_load_plane_luts(struct intel_dsb *dsb,
+                           const struct intel_plane_state *plane_state)
+{
+       struct intel_display *display = to_intel_display(plane_state);
+
+       if (display->funcs.color->load_plane_luts)
+               display->funcs.color->load_plane_luts(dsb, plane_state);
+}
+
 void intel_color_plane_program_pipeline(struct intel_dsb *dsb,
                                        const struct intel_plane_state *plane_state)
 {
        if (plane_state->hw.ctm)
                intel_color_load_plane_csc_matrix(dsb, plane_state);
+       if (plane_state->hw.degamma_lut || plane_state->hw.gamma_lut)
+               intel_color_load_plane_luts(dsb, plane_state);
 }
 
 void intel_color_crtc_init(struct intel_crtc *crtc)
index 6d8217497583e337ba8d806a2151acf4f5b3068c..c419a814cb34bae407ab161e9583e3cc80d470d6 100644 (file)
@@ -646,7 +646,7 @@ struct intel_plane_state {
                enum drm_color_encoding color_encoding;
                enum drm_color_range color_range;
                enum drm_scaling_filter scaling_filter;
-               struct drm_property_blob *ctm;
+               struct drm_property_blob *ctm, *degamma_lut, *gamma_lut;
        } hw;
 
        struct i915_vma *ggtt_vma;
index ad25af7394a6acdc76799ec0473c1a509a6fac4a..ade014f18fce0896b0c259be26d8a139b5af2174 100644 (file)
@@ -344,6 +344,10 @@ intel_plane_colorop_replace_blob(struct intel_plane_state *plane_state,
 {
        if (intel_colorop->id == INTEL_PLANE_CB_CSC)
                return drm_property_replace_blob(&plane_state->hw.ctm, blob);
+       else if (intel_colorop->id == INTEL_PLANE_CB_PRE_CSC_LUT)
+               return  drm_property_replace_blob(&plane_state->hw.degamma_lut, blob);
+       else if (intel_colorop->id == INTEL_PLANE_CB_POST_CSC_LUT)
+               return drm_property_replace_blob(&plane_state->hw.gamma_lut, blob);
 
        return false;
 }