ARM: shmobile: r8a7740: add MSTP clock assignments to DT

Assigns clocks to ether, i2c*, scif*, tpu, mmcif0, sdhi*, and fsi2.

Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 3c61c5d3032914dec8fbef7f49104c1202e06e87..6cd6a465b1967e301a308f15a7c8df60cf790908 100644 (file)
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -126,7 +126,7 @@ ether: ethernet@e9a00000 {
                reg = <0xe9a00000 0x800>,
                      <0xe9a01800 0x800>;
                interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
-               /* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */
+               clocks = <&mstp3_clks R8A7740_CLK_GETHER>;
                phy-mode = "mii";
                #address-cells = <1>;
                #size-cells = <0>;
@@ -142,6 +142,7 @@ i2c0: i2c@fff20000 {
                              0 202 IRQ_TYPE_LEVEL_HIGH
                              0 203 IRQ_TYPE_LEVEL_HIGH
                              0 204 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp1_clks R8A7740_CLK_IIC0>;
                status = "disabled";
        };
 
@@ -154,6 +155,7 @@ i2c1: i2c@e6c20000 {
                              0 71 IRQ_TYPE_LEVEL_HIGH
                              0 72 IRQ_TYPE_LEVEL_HIGH
                              0 73 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7740_CLK_IIC1>;
                status = "disabled";
        };
 
@@ -161,6 +163,8 @@ scifa0: serial@e6c40000 {
                compatible = "renesas,scifa-r8a7740", "renesas,scifa";
                reg = <0xe6c40000 0x100>;
                interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
@@ -168,6 +172,8 @@ scifa1: serial@e6c50000 {
                compatible = "renesas,scifa-r8a7740", "renesas,scifa";
                reg = <0xe6c50000 0x100>;
                interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7740_CLK_SCIFA1>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
@@ -175,6 +181,8 @@ scifa2: serial@e6c60000 {
                compatible = "renesas,scifa-r8a7740", "renesas,scifa";
                reg = <0xe6c60000 0x100>;
                interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
@@ -182,6 +190,8 @@ scifa3: serial@e6c70000 {
                compatible = "renesas,scifa-r8a7740", "renesas,scifa";
                reg = <0xe6c70000 0x100>;
                interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7740_CLK_SCIFA3>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
@@ -189,6 +199,8 @@ scifa4: serial@e6c80000 {
                compatible = "renesas,scifa-r8a7740", "renesas,scifa";
                reg = <0xe6c80000 0x100>;
                interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7740_CLK_SCIFA4>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
@@ -196,6 +208,8 @@ scifa5: serial@e6cb0000 {
                compatible = "renesas,scifa-r8a7740", "renesas,scifa";
                reg = <0xe6cb0000 0x100>;
                interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7740_CLK_SCIFA5>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
@@ -203,6 +217,8 @@ scifa6: serial@e6cc0000 {
                compatible = "renesas,scifa-r8a7740", "renesas,scifa";
                reg = <0xe6cc0000 0x100>;
                interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7740_CLK_SCIFA6>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
@@ -210,6 +226,8 @@ scifa7: serial@e6cd0000 {
                compatible = "renesas,scifa-r8a7740", "renesas,scifa";
                reg = <0xe6cd0000 0x100>;
                interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7740_CLK_SCIFA7>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
@@ -217,6 +235,8 @@ scifb8: serial@e6c30000 {
                compatible = "renesas,scifb-r8a7740", "renesas,scifb";
                reg = <0xe6c30000 0x100>;
                interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp2_clks R8A7740_CLK_SCIFB>;
+               clock-names = "sci_ick";
                status = "disabled";
        };
 
@@ -240,6 +260,7 @@ pfc: pfc@e6050000 {
        tpu: pwm@e6600000 {
                compatible = "renesas,tpu-r8a7740", "renesas,tpu";
                reg = <0xe6600000 0x100>;
+               clocks = <&mstp3_clks R8A7740_CLK_TPU0>;
                status = "disabled";
                #pwm-cells = <3>;
        };
@@ -249,6 +270,7 @@ mmcif0: mmc@e6bd0000 {
                reg = <0xe6bd0000 0x100>;
                interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
                              0 57 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7740_CLK_MMC>;
                status = "disabled";
        };
 
@@ -258,6 +280,7 @@ sdhi0: sd@e6850000 {
                interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
                              0 118 IRQ_TYPE_LEVEL_HIGH
                              0 119 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7740_CLK_SDHI0>;
                cap-sd-highspeed;
                cap-sdio-irq;
                status = "disabled";
@@ -269,6 +292,7 @@ sdhi1: sd@e6860000 {
                interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
                              0 122 IRQ_TYPE_LEVEL_HIGH
                              0 123 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp3_clks R8A7740_CLK_SDHI1>;
                cap-sd-highspeed;
                cap-sdio-irq;
                status = "disabled";
@@ -280,6 +304,7 @@ sdhi2: sd@e6870000 {
                interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
                              0 126 IRQ_TYPE_LEVEL_HIGH
                              0 127 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&mstp4_clks R8A7740_CLK_SDHI2>;
                cap-sd-highspeed;
                cap-sdio-irq;
                status = "disabled";
@@ -290,6 +315,7 @@ sh_fsi2: sound@fe1f0000 {
                compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
                reg = <0xfe1f0000 0x400>;
                interrupts = <0 9 0x4>;
+               clocks = <&mstp3_clks R8A7740_CLK_FSI>;
                status = "disabled";
        };