iommu/mediatek: mt8189: Add MM IOMMUs support

Add support for mt8189 MM IOMMUs.

Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index e71acaa292cc62a21ae8dbf356576c3b34376863..989e075991936086697743bb200cb275adee9d42 100644 (file)
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -1771,6 +1771,33 @@ static const struct mtk_iommu_plat_data mt8189_data_infra = {
        .iova_region_nr = ARRAY_SIZE(single_domain),
 };
 
+static const u32 mt8189_larb_region_msk[MT8192_MULTI_REGION_NR_MAX][MTK_LARB_NR_MAX] = {
+       [0] = {~0, ~0, ~0, [22] = BIT(0)},      /* Region0: all ports for larb0/1/2 */
+       [1] = {[3] = ~0, [4] = ~0},             /* Region1: all ports for larb4(3)/7(4) */
+       [2] = {[5] = ~0, [6] = ~0,              /* Region2: all ports for larb9(5)/11(6) */
+              [7] = ~0, [8] = ~0,              /* Region2: all ports for larb13(7)/14(8) */
+              [9] = ~0, [10] = ~0,             /* Region2: all ports for larb16(9)/17(10) */
+              [11] = ~0, [12] = ~0,            /* Region2: all ports for larb19(11)/20(12) */
+              [21] = ~0},                      /* Region2: larb21 fake GCE larb */
+};
+
+static const struct mtk_iommu_plat_data mt8189_data_mm = {
+       .m4u_plat       = M4U_MT8189,
+       .flags          = HAS_BCLK | HAS_SUB_COMM_3BITS | OUT_ORDER_WR_EN |
+                         WR_THROT_EN | IOVA_34_EN | MTK_IOMMU_TYPE_MM |
+                         PGTABLE_PA_35_EN | DL_WITH_MULTI_LARB,
+       .hw_list        = &m4ulist,
+       .inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+       .banks_num      = 5,
+       .banks_enable   = {true, false, false, false, false},
+       .iova_region    = mt8192_multi_dom,
+       .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
+       .iova_region_larb_msk = mt8189_larb_region_msk,
+       .larbid_remap   = {{0}, {1}, {21/* GCE_D */, 21/* GCE_M */, 2},
+                          {19, 20, 9, 11}, {7}, {4},
+                          {13, 17}, {14, 16}},
+};
+
 static const struct mtk_iommu_plat_data mt8192_data = {
        .m4u_plat       = M4U_MT8192,
        .flags          = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
@@ -1874,6 +1901,7 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
        { .compatible = "mediatek,mt8188-iommu-vpp",   .data = &mt8188_data_vpp},
        { .compatible = "mediatek,mt8189-iommu-apu",   .data = &mt8189_data_apu},
        { .compatible = "mediatek,mt8189-iommu-infra", .data = &mt8189_data_infra},
+       { .compatible = "mediatek,mt8189-iommu-mm",    .data = &mt8189_data_mm},
        { .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
        { .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
        { .compatible = "mediatek,mt8195-iommu-vdo",   .data = &mt8195_data_vdo},