arm64: dts: allwinner: h616: add crypto engine node

The Allwinner H616 SoC contains a crypto engine very similar to the H6
version, but with all base addresses in the DMA descriptors shifted by
two bits. This requires a new compatible string.
Also the H616 CE relies on the internal osciallator for the TRNG
operation, so we need to reference this clock.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20240624232110.9817-5-andre.przywara@arm.com
[wens@csie.org: fix up register range size]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index bf4d41ecbfdcf8bccedb30aeb73a4fcfa5dcec20..b29ce7321317b647733cb3db108a4b935a5dda9a 100644 (file)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -150,6 +150,16 @@ soc {
                #size-cells = <1>;
                ranges = <0x0 0x0 0x0 0x40000000>;
 
+               crypto: crypto@1904000 {
+                       compatible = "allwinner,sun50i-h616-crypto";
+                       reg = <0x01904000 0x800>;
+                       interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>,
+                                <&ccu CLK_MBUS_CE>, <&rtc CLK_IOSC>;
+                       clock-names = "bus", "mod", "ram", "trng";
+                       resets = <&ccu RST_BUS_CE>;
+               };
+
                syscon: syscon@3000000 {
                        compatible = "allwinner,sun50i-h616-system-control";
                        reg = <0x03000000 0x1000>;