iommu/mediatek: mt8189: Add APU IOMMUs support

Add support for mt8189 APU IOMMUs.

Signed-off-by: Zhengnan Chen <zhengnan.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Yong Wu <yong.wu@mediatek.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 7af47c59b10bd6d56066fb11f17b7f7f0160618e..aa4972aed91e5d942cce4e6c4847d0d969c6e63f 100644 (file)
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -139,6 +139,7 @@
 /* 2 bits: iommu type */
 #define MTK_IOMMU_TYPE_MM              (0x0 << 13)
 #define MTK_IOMMU_TYPE_INFRA           (0x1 << 13)
+#define MTK_IOMMU_TYPE_APU             (0x2 << 13)
 #define MTK_IOMMU_TYPE_MASK            (0x3 << 13)
 /* PM and clock always on. e.g. infra iommu */
 #define PM_CLK_AO                      BIT(15)
@@ -173,6 +174,7 @@ enum mtk_iommu_plat {
        M4U_MT8183,
        M4U_MT8186,
        M4U_MT8188,
+       M4U_MT8189,
        M4U_MT8192,
        M4U_MT8195,
        M4U_MT8365,
@@ -336,6 +338,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data, unsigned int ban
  */
 #define MTK_IOMMU_4GB_MODE_REMAP_BASE   0x140000000UL
 
+static LIST_HEAD(apulist);     /* List the apu iommu HWs */
 static LIST_HEAD(m4ulist);     /* List all the M4U HWs */
 
 #define for_each_m4u(data, head)  list_for_each_entry(data, head, list)
@@ -351,6 +354,15 @@ static const struct mtk_iommu_iova_region single_domain[] = {
 #define MT8192_MULTI_REGION_NR (IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) ? \
                                 MT8192_MULTI_REGION_NR_MAX : 1)
 
+static const struct mtk_iommu_iova_region mt8189_multi_dom_apu[] = {
+       { .iova_base = 0x200000ULL,     .size = SZ_512M},       /* APU SECURE */
+#if IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT)
+       { .iova_base = SZ_1G,           .size = 0xc0000000},    /* APU CODE */
+       { .iova_base = 0x70000000ULL,   .size = 0x12600000},    /* APU VLM */
+       { .iova_base = SZ_4G,           .size = SZ_4G * 3},     /* APU VPU */
+#endif
+};
+
 static const struct mtk_iommu_iova_region mt8192_multi_dom[MT8192_MULTI_REGION_NR] = {
        { .iova_base = 0x0,             .size = MTK_IOMMU_IOVA_SZ_4G},  /* 0 ~ 4G,  */
        #if IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT)
@@ -1725,6 +1737,27 @@ static const struct mtk_iommu_plat_data mt8188_data_vpp = {
                           27, 28 /* ccu0 */, MTK_INVALID_LARBID}, {4, 6}},
 };
 
+static const unsigned int mt8189_apu_region_msk[][MTK_LARB_NR_MAX] = {
+       [0] = {[0] = BIT(2)},   /* Region0: fake larb 0 APU_SECURE */
+       [1] = {[0] = BIT(1)},   /* Region1: fake larb 0 APU_CODE */
+       [2] = {[0] = BIT(3)},   /* Region2: fake larb 0 APU_VLM */
+       [3] = {[0] = BIT(0)},   /* Region3: fake larb 0 APU_DATA */
+};
+
+static const struct mtk_iommu_plat_data mt8189_data_apu = {
+       .m4u_plat       = M4U_MT8189,
+       .flags          = IOVA_34_EN | DCM_DISABLE |
+                         MTK_IOMMU_TYPE_APU | PGTABLE_PA_35_EN,
+       .hw_list        = &apulist,
+       .inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+       .banks_num      = 1,
+       .banks_enable   = {true},
+       .iova_region    = mt8189_multi_dom_apu,
+       .iova_region_nr = ARRAY_SIZE(mt8189_multi_dom_apu),
+       .larbid_remap   = {{0}, {1}, {2}, {3}, {4}, {5}, {6}, {7}},
+       .iova_region_larb_msk = mt8189_apu_region_msk,
+};
+
 static const struct mtk_iommu_plat_data mt8192_data = {
        .m4u_plat       = M4U_MT8192,
        .flags          = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN |
@@ -1826,6 +1859,7 @@ static const struct of_device_id mtk_iommu_of_ids[] = {
        { .compatible = "mediatek,mt8188-iommu-infra", .data = &mt8188_data_infra},
        { .compatible = "mediatek,mt8188-iommu-vdo",   .data = &mt8188_data_vdo},
        { .compatible = "mediatek,mt8188-iommu-vpp",   .data = &mt8188_data_vpp},
+       { .compatible = "mediatek,mt8189-iommu-apu",   .data = &mt8189_data_apu},
        { .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
        { .compatible = "mediatek,mt8195-iommu-infra", .data = &mt8195_data_infra},
        { .compatible = "mediatek,mt8195-iommu-vdo",   .data = &mt8195_data_vdo},