]> Gentwo Git Trees - linux/.git/commitdiff
arm64: dts: renesas: r8a77990: Use CPG/MSSR and SYSC binding definitions
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 30 Aug 2018 14:52:20 +0000 (16:52 +0200)
committerSimon Horman <horms+renesas@verge.net.au>
Thu, 13 Sep 2018 07:47:55 +0000 (09:47 +0200)
Use the SoC-specific CPG/MSSR include file to allow future use of
R8A77990_CLK_* symbols.
Replace the hardcoded power domain indices by R8A77990_PD_* symbols.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a77990.dtsi

index 2ee0edfb18d4b9d6acf6611587b15a398a0ccf5a..e2c2d1480a68cf1ba9c94961c1c9a5e45bc9584e 100644 (file)
@@ -5,7 +5,7 @@
  * Copyright (C) 2018 Renesas Electronics Corp.
  */
 
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/clock/r8a77990-cpg-mssr.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/r8a77990-sysc.h>
 
@@ -22,7 +22,7 @@ a53_0: cpu@0 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <0>;
                        device_type = "cpu";
-                       power-domains = <&sysc 5>;
+                       power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
                };
@@ -31,14 +31,14 @@ a53_1: cpu@1 {
                        compatible = "arm,cortex-a53", "arm,armv8";
                        reg = <1>;
                        device_type = "cpu";
-                       power-domains = <&sysc 6>;
+                       power-domains = <&sysc R8A77990_PD_CA53_CPU1>;
                        next-level-cache = <&L2_CA53>;
                        enable-method = "psci";
                };
 
                L2_CA53: cache-controller-0 {
                        compatible = "cache";
-                       power-domains = <&sysc 21>;
+                       power-domains = <&sysc R8A77990_PD_CA53_SCU>;
                        cache-unified;
                        cache-level = <2>;
                };
@@ -75,7 +75,7 @@ rwdt: watchdog@e6020000 {
                                     "renesas,rcar-gen3-wdt";
                        reg = <0 0xe6020000 0 0x0c>;
                        clocks = <&cpg CPG_MOD 402>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 402>;
                        status = "disabled";
                };
@@ -91,7 +91,7 @@ gpio0: gpio@e6050000 {
                        #interrupt-cells = <2>;
                        interrupt-controller;
                        clocks = <&cpg CPG_MOD 912>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 912>;
                };
 
@@ -106,7 +106,7 @@ gpio1: gpio@e6051000 {
                        #interrupt-cells = <2>;
                        interrupt-controller;
                        clocks = <&cpg CPG_MOD 911>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 911>;
                };
 
@@ -121,7 +121,7 @@ gpio2: gpio@e6052000 {
                        #interrupt-cells = <2>;
                        interrupt-controller;
                        clocks = <&cpg CPG_MOD 910>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 910>;
                };
 
@@ -136,7 +136,7 @@ gpio3: gpio@e6053000 {
                        #interrupt-cells = <2>;
                        interrupt-controller;
                        clocks = <&cpg CPG_MOD 909>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 909>;
                };
 
@@ -151,7 +151,7 @@ gpio4: gpio@e6054000 {
                        #interrupt-cells = <2>;
                        interrupt-controller;
                        clocks = <&cpg CPG_MOD 908>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 908>;
                };
 
@@ -166,7 +166,7 @@ gpio5: gpio@e6055000 {
                        #interrupt-cells = <2>;
                        interrupt-controller;
                        clocks = <&cpg CPG_MOD 907>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 907>;
                };
 
@@ -181,7 +181,7 @@ gpio6: gpio@e6055400 {
                        #interrupt-cells = <2>;
                        interrupt-controller;
                        clocks = <&cpg CPG_MOD 906>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 906>;
                };
 
@@ -329,7 +329,7 @@ avb: ethernet@e6800000 {
                                          "ch20", "ch21", "ch22", "ch23",
                                          "ch24";
                        clocks = <&cpg CPG_MOD 812>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 812>;
                        phy-mode = "rgmii";
                        #address-cells = <1>;
@@ -414,7 +414,7 @@ scif2: serial@e6e88000 {
                        interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 310>;
                        clock-names = "fck";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 310>;
                        status = "disabled";
                };
@@ -437,7 +437,7 @@ ohci0: usb@ee080000 {
                        clocks = <&cpg CPG_MOD 703>;
                        phys = <&usb2_phy0>;
                        phy-names = "usb";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 703>;
                        status = "disabled";
                };
@@ -450,7 +450,7 @@ ehci0: usb@ee080100 {
                        phys = <&usb2_phy0>;
                        phy-names = "usb";
                        companion = <&ohci0>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 703>;
                        status = "disabled";
                };
@@ -461,7 +461,7 @@ usb2_phy0: usb-phy@ee080200 {
                        reg = <0 0xee080200 0 0x700>;
                        interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&cpg CPG_MOD 703>;
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 703>;
                        #phy-cells = <0>;
                        status = "disabled";
@@ -480,7 +480,7 @@ gic: interrupt-controller@f1010000 {
                                        (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
                        clocks = <&cpg CPG_MOD 408>;
                        clock-names = "clk";
-                       power-domains = <&sysc 32>;
+                       power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
                        resets = <&cpg 408>;
                };