mtd: rawnand: sunxi: move ECC strenghts in sunxi_nfc_caps

H6/H616 has more ECC strenghts than A10/A23.

Move the ECC strenghts array to sunxi_nfc_caps to make it ready for
H6/H616 support.

No functional change.

Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>

diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index f24e8d2083f869030f616d96d3bc41f66e01132d..89115a8f07183e0bf5b96c81414a47729e31b0f5 100644 (file)
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -224,11 +224,15 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand)
  *                     through MBUS on A23/A33 needs extra configuration.
  * @reg_io_data:       I/O data register
  * @dma_maxburst:      DMA maxburst
+ * @ecc_strengths:     Available ECC strengths array
+ * @nstrengths:                Size of @ecc_strengths
  */
 struct sunxi_nfc_caps {
        bool has_mdma;
        unsigned int reg_io_data;
        unsigned int dma_maxburst;
+       const u8 *ecc_strengths;
+       unsigned int nstrengths;
 };
 
 /**
@@ -1630,9 +1634,9 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand,
                                       struct nand_ecc_ctrl *ecc,
                                       struct device_node *np)
 {
-       static const u8 strengths[] = { 16, 24, 28, 32, 40, 48, 56, 60, 64 };
        struct sunxi_nand_chip *sunxi_nand = to_sunxi_nand(nand);
        struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller);
+       const u8 *strengths = nfc->caps->ecc_strengths;
        struct mtd_info *mtd = nand_to_mtd(nand);
        struct nand_device *nanddev = mtd_to_nanddev(mtd);
        int nsectors;
@@ -1656,7 +1660,7 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand,
 
                ecc->strength = bytes * 8 / fls(8 * ecc->size);
 
-               for (i = 0; i < ARRAY_SIZE(strengths); i++) {
+               for (i = 0; i < nfc->caps->nstrengths; i++) {
                        if (strengths[i] > ecc->strength)
                                break;
                }
@@ -1677,7 +1681,7 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand,
        }
 
        /* Add ECC info retrieval from DT */
-       for (i = 0; i < ARRAY_SIZE(strengths); i++) {
+       for (i = 0; i < nfc->caps->nstrengths; i++) {
                if (ecc->strength <= strengths[i]) {
                        /*
                         * Update ecc->strength value with the actual strength
@@ -1688,7 +1692,7 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_chip *nand,
                }
        }
 
-       if (i >= ARRAY_SIZE(strengths)) {
+       if (i >= nfc->caps->nstrengths) {
                dev_err(nfc->dev, "unsupported strength\n");
                return -ENOTSUPP;
        }
@@ -2178,15 +2182,23 @@ static void sunxi_nfc_remove(struct platform_device *pdev)
                dma_release_channel(nfc->dmac);
 }
 
+static const u8 sunxi_ecc_strengths_a10[] = {
+       16, 24, 28, 32, 40, 48, 56, 60, 64
+};
+
 static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
        .reg_io_data = NFC_REG_A10_IO_DATA,
        .dma_maxburst = 4,
+       .ecc_strengths = sunxi_ecc_strengths_a10,
+       .nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),
 };
 
 static const struct sunxi_nfc_caps sunxi_nfc_a23_caps = {
        .has_mdma = true,
        .reg_io_data = NFC_REG_A23_IO_DATA,
        .dma_maxburst = 8,
+       .ecc_strengths = sunxi_ecc_strengths_a10,
+       .nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),
 };
 
 static const struct of_device_id sunxi_nfc_ids[] = {