PCI: brcmstb: Add a way to indicate if PCIe bridge is active

In a future commit, a new handler will be introduced that in part does
reads and writes to some of the PCIe registers.  When this handler is
invoked, it is paramount that it does not do these register accesses when
the PCIe bridge is inactive, as this will cause CPU abort errors.

To solve this we keep a spinlock that guards a variable which indicates
whether the bridge is on or off.  When the bridge is on, access of the PCIe
HW registers may proceed.

Since there are multiple ways to reset the bridge, we introduce a general
function to obtain the spinlock, call the specific function that is used
for the specific SoC, sets the bridge active indicator variable, and
releases the spinlock.

Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/20251029193616.3670003-2-james.quinlan@broadcom.com

diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index 7e9b2f6a604a5a7350620b7a41045520c36060d4..53434f09ac3d33284664b9ddf139b7b60d1b5998 100644 (file)
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -30,6 +30,7 @@
 #include <linux/reset.h>
 #include <linux/sizes.h>
 #include <linux/slab.h>
+#include <linux/spinlock.h>
 #include <linux/string.h>
 #include <linux/types.h>
 
@@ -258,6 +259,7 @@ struct pcie_cfg_data {
        int (*perst_set)(struct brcm_pcie *pcie, u32 val);
        int (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
        int (*post_setup)(struct brcm_pcie *pcie);
+       bool has_err_report;
 };
 
 struct subdev_regulators {
@@ -302,6 +304,8 @@ struct brcm_pcie {
        struct subdev_regulators *sr;
        bool                    ep_wakeup_capable;
        const struct pcie_cfg_data      *cfg;
+       bool                    bridge_in_reset;
+       spinlock_t              bridge_lock;
 };
 
 static inline bool is_bmips(const struct brcm_pcie *pcie)
@@ -309,6 +313,24 @@ static inline bool is_bmips(const struct brcm_pcie *pcie)
        return pcie->cfg->soc_base == BCM7435 || pcie->cfg->soc_base == BCM7425;
 }
 
+static int brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, u32 val)
+{
+       unsigned long flags;
+       int ret;
+
+       if (pcie->cfg->has_err_report)
+               spin_lock_irqsave(&pcie->bridge_lock, flags);
+
+       ret = pcie->cfg->bridge_sw_init_set(pcie, val);
+       /* If we fail, assume the bridge is in reset (off) */
+       pcie->bridge_in_reset = ret ? true : val;
+
+       if (pcie->cfg->has_err_report)
+               spin_unlock_irqrestore(&pcie->bridge_lock, flags);
+
+       return ret;
+}
+
 /*
  * This is to convert the size of the inbound "BAR" region to the
  * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE
@@ -1080,7 +1102,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
        int memc, ret;
 
        /* Reset the bridge */
-       ret = pcie->cfg->bridge_sw_init_set(pcie, 1);
+       ret = brcm_pcie_bridge_sw_init_set(pcie, 1);
        if (ret)
                return ret;
 
@@ -1096,7 +1118,7 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
        usleep_range(100, 200);
 
        /* Take the bridge out of reset */
-       ret = pcie->cfg->bridge_sw_init_set(pcie, 0);
+       ret = brcm_pcie_bridge_sw_init_set(pcie, 0);
        if (ret)
                return ret;
 
@@ -1561,7 +1583,7 @@ static int brcm_pcie_turn_off(struct brcm_pcie *pcie)
 
        if (!(pcie->cfg->quirks & CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN))
                /* Shutdown PCIe bridge */
-               ret = pcie->cfg->bridge_sw_init_set(pcie, 1);
+               ret = brcm_pcie_bridge_sw_init_set(pcie, 1);
 
        return ret;
 }
@@ -1649,7 +1671,9 @@ static int brcm_pcie_resume_noirq(struct device *dev)
                goto err_reset;
 
        /* Take bridge out of reset so we can access the SERDES reg */
-       pcie->cfg->bridge_sw_init_set(pcie, 0);
+       ret = brcm_pcie_bridge_sw_init_set(pcie, 0);
+       if (ret)
+               goto err_reset;
 
        /* SERDES_IDDQ = 0 */
        tmp = readl(base + HARD_DEBUG(pcie));
@@ -1917,7 +1941,10 @@ static int brcm_pcie_probe(struct platform_device *pdev)
        if (ret)
                return dev_err_probe(&pdev->dev, ret, "could not enable clock\n");
 
-       pcie->cfg->bridge_sw_init_set(pcie, 0);
+       ret = brcm_pcie_bridge_sw_init_set(pcie, 0);
+       if (ret)
+               return dev_err_probe(&pdev->dev, ret,
+                                    "could not de-assert bridge reset\n");
 
        if (pcie->swinit_reset) {
                ret = reset_control_assert(pcie->swinit_reset);
@@ -1992,6 +2019,9 @@ static int brcm_pcie_probe(struct platform_device *pdev)
                return ret;
        }
 
+       if (pcie->cfg->has_err_report)
+               spin_lock_init(&pcie->bridge_lock);
+
        return 0;
 
 fail: