]> Gentwo Git Trees - linux/.git/commitdiff
drm/amd/display: Check DCCG_AUDIO_DTO2 register mask exist
authorCharlene Liu <Charlene.Liu@amd.com>
Tue, 28 Oct 2025 01:40:21 +0000 (21:40 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 18 Nov 2025 15:51:44 +0000 (10:51 -0500)
[Why&How]
Check DCCG_AUDIO_DTO2 register mask exist before access.
Also,  add a existing DIO_CLOCK_control register for later use.

Reviewed-by: Roman Li <roman.li@amd.com>
Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dce/dce_audio.c
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h

index eeed840073fe450a7adefc5fd4b02a30d7e281c3..fcad61c618a1a5d29a2ad5e919e190d2477ec3e7 100644 (file)
@@ -1143,7 +1143,8 @@ void dce_aud_wall_dto_setup(
                REG_UPDATE(DCCG_AUDIO_DTO1_PHASE,
                                DCCG_AUDIO_DTO1_PHASE, clock_info.audio_dto_phase);
 
-               REG_UPDATE(DCCG_AUDIO_DTO_SOURCE,
+               if (aud->masks->DCCG_AUDIO_DTO2_USE_512FBR_DTO)
+                       REG_UPDATE(DCCG_AUDIO_DTO_SOURCE,
                                DCCG_AUDIO_DTO2_USE_512FBR_DTO, 1);
 
        }
index 0fc66487d800716c98075fbc5fdb3b80443e05cc..e1fa2e80a15ac3734ef462be9df9df4f5b4fa9b2 100644 (file)
@@ -227,7 +227,8 @@ void dcn401_prepare_mcache_programming(struct dc *dc, struct dc_state *context);
 #define LE_DCN401_REG_LIST_RI(id)                                            \
        LE_DCN3_REG_LIST_RI(id), \
        SRI_ARR(DP_DPHY_INTERNAL_CTRL, DP, id), \
-       SRI_ARR(DIG_BE_CLK_CNTL, DIG, id)
+       SRI_ARR(DIG_BE_CLK_CNTL, DIG, id),\
+       SR_ARR(DIO_CLK_CNTL, id)
 
 /* DPP */
 #define DPP_REG_LIST_DCN401_COMMON_RI(id)                                    \