]> Gentwo Git Trees - linux/.git/commitdiff
iommu/amd: Enhance "Completion-wait Time-out" error message
authorDheeraj Kumar Srivastava <dheerajkumar.srivastava@amd.com>
Wed, 12 Nov 2025 21:13:50 +0000 (02:43 +0530)
committerJoerg Roedel <joerg.roedel@amd.com>
Thu, 13 Nov 2025 15:13:26 +0000 (16:13 +0100)
Current IOMMU driver prints "Completion-wait Time-out" error message with
insufficient information to further debug the issue.

Enhancing the error message as following:
1. Log IOMMU PCI device ID in the error message.
2. With "amd_iommu_dump=1" kernel command line option, dump entire
   command buffer entries including Head and Tail offset.

Dump the entire command buffer only on the first 'Completion-wait Time-out'
to avoid dmesg spam.

Signed-off-by: Dheeraj Kumar Srivastava <dheerajkumar.srivastava@amd.com>
Reviewed-by: Ankit Soni <Ankit.Soni@amd.com>
Reviewed-by: Vasant Hegde <vasant.hegde@amd.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
drivers/iommu/amd/amd_iommu_types.h
drivers/iommu/amd/iommu.c

index a698a2e7ce2a6ecbb11e58f6e0ea4d6d468922f6..b4f552072101990c64e5d4937ed1efec17ab5e2b 100644 (file)
 #define CMD_BUFFER_ENTRIES 512
 #define MMIO_CMD_SIZE_SHIFT 56
 #define MMIO_CMD_SIZE_512 (0x9ULL << MMIO_CMD_SIZE_SHIFT)
+#define MMIO_CMD_HEAD_MASK     GENMASK_ULL(18, 4)      /* Command buffer head ptr field [18:4] */
+#define MMIO_CMD_BUFFER_HEAD(x) FIELD_GET(MMIO_CMD_HEAD_MASK, (x))
+#define MMIO_CMD_TAIL_MASK     GENMASK_ULL(18, 4)      /* Command buffer tail ptr field [18:4] */
+#define MMIO_CMD_BUFFER_TAIL(x) FIELD_GET(MMIO_CMD_TAIL_MASK, (x))
 
 /* constants for event buffer handling */
 #define EVT_BUFFER_SIZE                8192 /* 512 entries */
index 2e1865daa1cee87aedd759063a19f1f5f31951e6..a520a109f8d6d55214476ed564bf34226eb4131c 100644 (file)
@@ -1157,6 +1157,25 @@ irqreturn_t amd_iommu_int_handler(int irq, void *data)
  *
  ****************************************************************************/
 
+static void dump_command_buffer(struct amd_iommu *iommu)
+{
+       struct iommu_cmd *cmd;
+       u32 head, tail;
+       int i;
+
+       head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
+       tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
+
+       pr_err("CMD Buffer head=%llu tail=%llu\n", MMIO_CMD_BUFFER_HEAD(head),
+              MMIO_CMD_BUFFER_TAIL(tail));
+
+       for (i = 0; i < CMD_BUFFER_ENTRIES; i++) {
+               cmd = (struct iommu_cmd *)(iommu->cmd_buf + i * sizeof(*cmd));
+               pr_err("%3d: %08x %08x %08x %08x\n", i, cmd->data[0], cmd->data[1], cmd->data[2],
+                      cmd->data[3]);
+       }
+}
+
 static int wait_on_sem(struct amd_iommu *iommu, u64 data)
 {
        int i = 0;
@@ -1167,7 +1186,14 @@ static int wait_on_sem(struct amd_iommu *iommu, u64 data)
        }
 
        if (i == LOOP_TIMEOUT) {
-               pr_alert("Completion-Wait loop timed out\n");
+
+               pr_alert("IOMMU %04x:%02x:%02x.%01x: Completion-Wait loop timed out\n",
+                        iommu->pci_seg->id, PCI_BUS_NUM(iommu->devid),
+                        PCI_SLOT(iommu->devid), PCI_FUNC(iommu->devid));
+
+               if (amd_iommu_dump)
+                       DO_ONCE_LITE(dump_command_buffer, iommu);
+
                return -EIO;
        }