drm/msm/adreno: Move gbif_halt() to adreno_gpu_func

Move the gbif halt fn to adreno_gpu_func so that we can call different
implementation from common code. This will come handy when we implement
A8x layer.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/689005/
Message-ID: <20251118-kaana-gpu-support-v4-7-86eeb8e93fb6@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index 52653ad376fc0e2ead056354b5f8f725f6e83f0f..b0be246b44abe1e2582cedc1422e00e2bc20d39a 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -1079,7 +1079,7 @@ static void a6xx_gmu_force_off(struct a6xx_gmu *gmu)
        /* Halt the gmu cm3 core */
        gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);
 
-       a6xx_bus_clear_pending_transactions(adreno_gpu, true);
+       adreno_gpu->funcs->bus_halt(adreno_gpu, true);
 
        /* Reset GPU core blocks */
        a6xx_gpu_sw_reset(gpu, true);
@@ -1251,7 +1251,7 @@ static void a6xx_gmu_shutdown(struct a6xx_gmu *gmu)
        if (ret)
                goto force_off;
 
-       a6xx_bus_clear_pending_transactions(adreno_gpu, a6xx_gpu->hung);
+       adreno_gpu->funcs->bus_halt(adreno_gpu, a6xx_gpu->hung);
 
        /* tell the GMU we want to slumber */
        ret = a6xx_gmu_notify_slumber(gmu);

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index ba95b29855a3f8bd157b0926ebe3c34501ffaab6..575f2f9d3b1d6efb644a83be5e8012c815a08be1 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1595,7 +1595,7 @@ static void a6xx_recover(struct msm_gpu *gpu)
 
        if (adreno_has_gmu_wrapper(adreno_gpu) || adreno_has_rgmu(adreno_gpu)) {
                /* Drain the outstanding traffic on memory buses */
-               a6xx_bus_clear_pending_transactions(adreno_gpu, true);
+               adreno_gpu->funcs->bus_halt(adreno_gpu, true);
 
                /* Reset the GPU to a clean state */
                a6xx_gpu_sw_reset(gpu, true);
@@ -2316,7 +2316,7 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu)
        mutex_lock(&a6xx_gpu->gmu.lock);
 
        /* Drain the outstanding traffic on memory buses */
-       a6xx_bus_clear_pending_transactions(adreno_gpu, true);
+       adreno_gpu->funcs->bus_halt(adreno_gpu, true);
 
        if (adreno_is_a619_holi(adreno_gpu))
                a6xx_sptprac_disable(gmu);
@@ -2685,6 +2685,7 @@ const struct adreno_gpu_funcs a6xx_gpu_funcs = {
        },
        .init = a6xx_gpu_init,
        .get_timestamp = a6xx_gmu_get_timestamp,
+       .bus_halt = a6xx_bus_clear_pending_transactions,
 };
 
 const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs = {
@@ -2715,6 +2716,7 @@ const struct adreno_gpu_funcs a6xx_gmuwrapper_funcs = {
        },
        .init = a6xx_gpu_init,
        .get_timestamp = a6xx_get_timestamp,
+       .bus_halt = a6xx_bus_clear_pending_transactions,
 };
 
 const struct adreno_gpu_funcs a7xx_gpu_funcs = {
@@ -2747,4 +2749,5 @@ const struct adreno_gpu_funcs a7xx_gpu_funcs = {
        },
        .init = a6xx_gpu_init,
        .get_timestamp = a6xx_gmu_get_timestamp,
+       .bus_halt = a6xx_bus_clear_pending_transactions,
 };

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 335acd5feb82c3e99a8e037ce3e3d1df012329ec..08bb601b3bd3252c57489f101e0255719b244a74 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -77,6 +77,7 @@ struct adreno_gpu_funcs {
        struct msm_gpu_funcs base;
        struct msm_gpu *(*init)(struct drm_device *dev);
        int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value);
+       void (*bus_halt)(struct adreno_gpu *adreno_gpu, bool gx_off);
 };
 
 struct adreno_reglist {