]> Gentwo Git Trees - linux/.git/commitdiff
drm/msm/dpu: bind correct pingpong for quad pipe
authorJun Nie <jun.nie@linaro.org>
Thu, 18 Sep 2025 13:28:54 +0000 (21:28 +0800)
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Fri, 14 Nov 2025 03:56:59 +0000 (05:56 +0200)
There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
interface to 3rd PP instead of the 2nd PP.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/675402/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-2-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

index 94de83e125f1a05a3cde9cd7a49a805368fe1cdc..d0ed9e3a33892132f982dbe33a2a524a213510cf 100644 (file)
@@ -1160,7 +1160,7 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc,
        struct dpu_hw_blk *hw_ctl[MAX_CHANNELS_PER_ENC];
        struct dpu_hw_blk *hw_dsc[MAX_CHANNELS_PER_ENC];
        struct dpu_hw_blk *hw_cwb[MAX_CHANNELS_PER_ENC];
-       int num_ctl, num_pp, num_dsc;
+       int num_ctl, num_pp, num_dsc, num_pp_per_intf;
        int num_cwb = 0;
        bool is_cwb_encoder;
        unsigned int dsc_mask = 0;
@@ -1239,10 +1239,16 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc,
                dpu_enc->cur_master->hw_cdm = hw_cdm ? to_dpu_hw_cdm(hw_cdm) : NULL;
        }
 
+       /*
+        * There may be 4 PP and 2 INTF for quad pipe case, so INTF is not
+        * mapped to PP 1:1. Let's calculate the stride with pipe/INTF
+        */
+       num_pp_per_intf = num_pp / dpu_enc->num_phys_encs;
+
        for (i = 0; i < dpu_enc->num_phys_encs; i++) {
                struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
 
-               phys->hw_pp = dpu_enc->hw_pp[i];
+               phys->hw_pp = dpu_enc->hw_pp[num_pp_per_intf * i];
                if (!phys->hw_pp) {
                        DPU_ERROR_ENC(dpu_enc,
                                "no pp block assigned at idx: %d\n", i);