KVM: arm64: at: Use correct HA bit in TCR_EL2 when regime is EL2

According to ARM DDI 0487L.b, the HA bit in TCR_EL2 when the translation
regime is EL2 (or !ELIsInHost(EL2)) is bit 21, not 39.

Fixes: c59ca4b5b0c3 ("KVM: arm64: Implement HW access flag management in stage-1 SW PTW")
Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com>
Link: https://msgid.link/20251128100946.74210-3-alexandru.elisei@arm.com
Signed-off-by: Oliver Upton <oupton@kernel.org>

diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 1da290aeedce7647bea610e632e7df7932d8a512..e500600e4b9b8cf555a5b555db21b935dc6f83c1 100644 (file)
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -111,6 +111,7 @@
 #define TCR_EL2_DS             (1UL << 32)
 #define TCR_EL2_RES1           ((1U << 31) | (1 << 23))
 #define TCR_EL2_HPD            (1 << 24)
+#define TCR_EL2_HA             (1 << 21)
 #define TCR_EL2_TBI            (1 << 20)
 #define TCR_EL2_PS_SHIFT       16
 #define TCR_EL2_PS_MASK                (7 << TCR_EL2_PS_SHIFT)

diff --git a/arch/arm64/kvm/at.c b/arch/arm64/kvm/at.c
index d25fef0f66e21a58400d5a6a23cb36a042a3c0f7..6d41a95f6c60efbf7486d0ee3097ce383aa097a6 100644 (file)
--- a/arch/arm64/kvm/at.c
+++ b/arch/arm64/kvm/at.c
@@ -346,7 +346,9 @@ static int setup_s1_walk(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
 
        wi->baddr &= GENMASK_ULL(wi->max_oa_bits - 1, x);
 
-       wi->ha = tcr & TCR_HA;
+       wi->ha = (wi->regime == TR_EL2 ?
+                 FIELD_GET(TCR_EL2_HA, tcr) :
+                 FIELD_GET(TCR_HA, tcr));
 
        return 0;