arm64: dts: qcom: fix indentation error in sm8250 cpu nodes

Use tabs instead of 6 spaces.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Link: https://lore.kernel.org/r/20201123144016.19596-1-jonathan@marek.ca
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index a679f6864065d3f71a1c9951c89f37908a7a60ad..65acd1f381eba849bf612e42f1689c10caa088e7 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -93,10 +93,10 @@ CPU0: cpu@0 {
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        L2_0: l2-cache {
-                             compatible = "cache";
-                             next-level-cache = <&L3_0>;
+                               compatible = "cache";
+                               next-level-cache = <&L3_0>;
                                L3_0: l3-cache {
-                                     compatible = "cache";
+                                       compatible = "cache";
                                };
                        };
                };
@@ -110,8 +110,8 @@ CPU1: cpu@100 {
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        L2_100: l2-cache {
-                             compatible = "cache";
-                             next-level-cache = <&L3_0>;
+                               compatible = "cache";
+                               next-level-cache = <&L3_0>;
                        };
                };
 
@@ -124,8 +124,8 @@ CPU2: cpu@200 {
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        L2_200: l2-cache {
-                             compatible = "cache";
-                             next-level-cache = <&L3_0>;
+                               compatible = "cache";
+                               next-level-cache = <&L3_0>;
                        };
                };
 
@@ -138,8 +138,8 @@ CPU3: cpu@300 {
                        qcom,freq-domain = <&cpufreq_hw 0>;
                        #cooling-cells = <2>;
                        L2_300: l2-cache {
-                             compatible = "cache";
-                             next-level-cache = <&L3_0>;
+                               compatible = "cache";
+                               next-level-cache = <&L3_0>;
                        };
                };
 
@@ -152,8 +152,8 @@ CPU4: cpu@400 {
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        #cooling-cells = <2>;
                        L2_400: l2-cache {
-                             compatible = "cache";
-                             next-level-cache = <&L3_0>;
+                               compatible = "cache";
+                               next-level-cache = <&L3_0>;
                        };
                };
 
@@ -166,8 +166,8 @@ CPU5: cpu@500 {
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        #cooling-cells = <2>;
                        L2_500: l2-cache {
-                             compatible = "cache";
-                             next-level-cache = <&L3_0>;
+                               compatible = "cache";
+                               next-level-cache = <&L3_0>;
                        };
 
                };
@@ -181,8 +181,8 @@ CPU6: cpu@600 {
                        qcom,freq-domain = <&cpufreq_hw 1>;
                        #cooling-cells = <2>;
                        L2_600: l2-cache {
-                             compatible = "cache";
-                             next-level-cache = <&L3_0>;
+                               compatible = "cache";
+                               next-level-cache = <&L3_0>;
                        };
                };
 
@@ -195,8 +195,8 @@ CPU7: cpu@700 {
                        qcom,freq-domain = <&cpufreq_hw 2>;
                        #cooling-cells = <2>;
                        L2_700: l2-cache {
-                             compatible = "cache";
-                             next-level-cache = <&L3_0>;
+                               compatible = "cache";
+                               next-level-cache = <&L3_0>;
                        };
                };
        };