drm/amd/display: Enable support for PQ 125 EOTF and Inverse

This patchset enables support for the PQ_125 EOTF and its inverse
on all existing plane 1D curve colorops, i.e., on DEGAM, SHAPER,
and BLND blocks.

With this patchset the following IGT subtests are passing:
kms_colorop --run plane-XR30-XR30-pq_125_eotf
kms_colorop --run plane-XR30-XR30-pq_125_inv_eotf
kms_colorop --run plane-XR30-XR30-pq_125_eotf-pq_125_inv_eotf
kms_colorop --run plane-XR30-XR30-pq_125_eotf-pq_125_inv_eotf-pq_125_eotf

Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Simon Ser <contact@emersion.fr>
Link: https://patch.msgid.link/20251115000237.3561250-33-alex.hung@amd.com

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index f25a302405f0d97061e4ec588b392c9a179be933..30665db34dfd90bc35ddbd0d4d615b14378463a3 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -26,6 +26,7 @@
 #include "amdgpu.h"
 #include "amdgpu_mode.h"
 #include "amdgpu_dm.h"
+#include "amdgpu_dm_colorop.h"
 #include "dc.h"
 #include "modules/color/color_gamma.h"
 
@@ -674,6 +675,9 @@ amdgpu_colorop_tf_to_dc_tf(enum drm_colorop_curve_1d_type tf)
        case DRM_COLOROP_1D_CURVE_SRGB_EOTF:
        case DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF:
                return TRANSFER_FUNCTION_SRGB;
+       case DRM_COLOROP_1D_CURVE_PQ_125_EOTF:
+       case DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF:
+               return TRANSFER_FUNCTION_PQ;
        default:
                return TRANSFER_FUNCTION_LINEAR;
        }
@@ -1197,8 +1201,10 @@ __set_colorop_in_tf_1d_curve(struct dc_plane_state *dc_plane_state,
        struct drm_colorop *colorop = colorop_state->colorop;
        struct drm_device *drm = colorop->dev;
 
-       if (colorop->type != DRM_COLOROP_1D_CURVE ||
-           colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_EOTF)
+       if (colorop->type != DRM_COLOROP_1D_CURVE)
+               return -EINVAL;
+
+       if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_degam_tfs))
                return -EINVAL;
 
        if (colorop_state->bypass) {
@@ -1230,7 +1236,7 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state,
        /* 1st op: 1d curve - degamma */
        for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
                if (new_colorop_state->colorop == old_colorop &&
-                   new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_EOTF) {
+                   (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_degam_tfs)) {
                        colorop_state = new_colorop_state;
                        break;
                }
@@ -1250,8 +1256,10 @@ __set_colorop_in_shaper_1d_curve(struct dc_plane_state *dc_plane_state,
        struct drm_colorop *colorop = colorop_state->colorop;
        struct drm_device *drm = colorop->dev;
 
-       if (colorop->type != DRM_COLOROP_1D_CURVE &&
-           colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF)
+       if (colorop->type != DRM_COLOROP_1D_CURVE)
+               return -EINVAL;
+
+       if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_shaper_tfs))
                return -EINVAL;
 
        if (colorop_state->bypass) {
@@ -1287,7 +1295,7 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
        /* 2nd op: 1d curve - shaper */
        for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
                if (new_colorop_state->colorop == old_colorop &&
-                   new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) {
+                   (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_shaper_tfs)) {
                        colorop_state = new_colorop_state;
                        break;
                }
@@ -1314,8 +1322,10 @@ __set_colorop_1d_curve_blend_tf_lut(struct dc_plane_state *dc_plane_state,
        const struct drm_color_lut *blend_lut = NULL;
        u32 blend_size = 0;
 
-       if (colorop->type != DRM_COLOROP_1D_CURVE &&
-           colorop_state->curve_1d_type != DRM_COLOROP_1D_CURVE_SRGB_EOTF)
+       if (colorop->type != DRM_COLOROP_1D_CURVE)
+               return -EINVAL;
+
+       if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs))
                return -EINVAL;
 
        if (colorop_state->bypass) {
@@ -1351,7 +1361,7 @@ __set_dm_plane_colorop_blend(struct drm_plane_state *plane_state,
        /* 3nd op: 1d curve - blend */
        for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
                if (new_colorop_state->colorop == old_colorop &&
-                   new_colorop_state->curve_1d_type == DRM_COLOROP_1D_CURVE_SRGB_EOTF) {
+                   (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) {
                        colorop_state = new_colorop_state;
                        break;
                }

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
index aec67b0546b1bbd7d4f48104e21c69e8d0d1dc91..cee7129550f15f2ec22fa3466872668b63509faa 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
@@ -32,13 +32,16 @@
 #include "amdgpu_dm_colorop.h"
 
 const u64 amdgpu_dm_supported_degam_tfs =
-       BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF);
+       BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
+       BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF);
 
 const u64 amdgpu_dm_supported_shaper_tfs =
-       BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF);
+       BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) |
+       BIT(DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF);
 
 const u64 amdgpu_dm_supported_blnd_tfs =
-       BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF);
+       BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
+       BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF);
 
 #define MAX_COLOR_PIPELINE_OPS 10