drm/amdgpu/gmc12: add amdgpu_vm_handle_fault() handling

We need to call amdgpu_vm_handle_fault() on page fault
on all gfx9 and newer parts to properly update the
page tables, not just for recoverable page faults.

Cc: stable@vger.kernel.org
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
index cad2d19105c4c8b5dd726120091eec4b43c34eb7..f22b4197a1c96ded71348c35d1453c39251753ff 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
@@ -91,6 +91,8 @@ static int gmc_v12_0_process_interrupt(struct amdgpu_device *adev,
                                       struct amdgpu_iv_entry *entry)
 {
        struct amdgpu_vmhub *hub;
+       bool retry_fault = !!(entry->src_data[1] & 0x80);
+       bool write_fault = !!(entry->src_data[1] & 0x20);
        uint32_t status = 0;
        u64 addr;
 
@@ -102,6 +104,31 @@ static int gmc_v12_0_process_interrupt(struct amdgpu_device *adev,
        else
                hub = &adev->vmhub[AMDGPU_GFXHUB(0)];
 
+       if (retry_fault) {
+               /* Returning 1 here also prevents sending the IV to the KFD */
+
+               /* Process it only if it's the first fault for this address */
+               if (entry->ih != &adev->irq.ih_soft &&
+                   amdgpu_gmc_filter_faults(adev, entry->ih, addr, entry->pasid,
+                                            entry->timestamp))
+                       return 1;
+
+               /* Delegate it to a different ring if the hardware hasn't
+                * already done it.
+                */
+               if (entry->ih == &adev->irq.ih) {
+                       amdgpu_irq_delegate(adev, entry, 8);
+                       return 1;
+               }
+
+               /* Try to handle the recoverable page faults by filling page
+                * tables
+                */
+               if (amdgpu_vm_handle_fault(adev, entry->pasid, 0, 0, addr,
+                                          entry->timestamp, write_fault))
+                       return 1;
+       }
+
        if (!amdgpu_sriov_vf(adev)) {
                /*
                 * Issue a dummy read to wait for the status register to