From: Jason Gunthorpe <jgg@nvidia.com>
Date: Thu, 23 Oct 2025 18:22:34 +0000 (-0300)
Subject: iommupt/x86: Set the dirty bit only for writable PTEs
X-Git-Tag: v6.19-rc1~133^2^8~35
X-Git-Url: https://gentwo.org/gitweb/?a=commitdiff_plain;h=1978fac28168bc3e6a66afb9c41ec0f1e8dafa0f;p=linux%2F.git

iommupt/x86: Set the dirty bit only for writable PTEs

AMD and VTD are historically different here, adopt the VTD version of
setting the D bit only on writable PTEs as it makes more sense.

Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---

diff --git a/drivers/iommu/generic_pt/fmt/x86_64.h b/drivers/iommu/generic_pt/fmt/x86_64.h
index 18d736d14b2d..7d01370e4ab0 100644
--- a/drivers/iommu/generic_pt/fmt/x86_64.h
+++ b/drivers/iommu/generic_pt/fmt/x86_64.h
@@ -192,9 +192,9 @@ static inline int x86_64_pt_iommu_set_prot(struct pt_common *common,
 {
 	u64 pte;
 
-	pte = X86_64_FMT_U | X86_64_FMT_A | X86_64_FMT_D;
+	pte = X86_64_FMT_U | X86_64_FMT_A;
 	if (iommu_prot & IOMMU_WRITE)
-		pte |= X86_64_FMT_RW;
+		pte |= X86_64_FMT_RW | X86_64_FMT_D;
 
 	/*
 	 * Ideally we'd have an IOMMU_ENCRYPTED flag set by higher levels to