From: Bagas Sanjaya Date: Tue, 4 Nov 2025 04:18:12 +0000 (+0700) Subject: Documentation: tps6594-pfsm: Fix macro cross-reference syntax X-Git-Url: https://gentwo.org/gitweb/?a=commitdiff_plain;h=77cbf5fbe572f199f401a4740b9fc38707770a30;p=linux%2F.git Documentation: tps6594-pfsm: Fix macro cross-reference syntax C macro references are erroneously written using :c:macro:: (note the double colon). This causes the references to be outputted as combination of verbatim roles and italicized names instead. Correct the syntax. Fixes: dce548889650c1 ("Documentation: Add TI TPS6594 PFSM") Signed-off-by: Bagas Sanjaya Reviewed-by: Randy Dunlap Tested-by: Randy Dunlap Signed-off-by: Jonathan Corbet Message-ID: <20251104041812.31402-4-bagasdotme@gmail.com> --- diff --git a/Documentation/misc-devices/tps6594-pfsm.rst b/Documentation/misc-devices/tps6594-pfsm.rst index 4ada37ccdcba..5f17a4fd9579 100644 --- a/Documentation/misc-devices/tps6594-pfsm.rst +++ b/Documentation/misc-devices/tps6594-pfsm.rst @@ -39,28 +39,28 @@ include/uapi/linux/tps6594_pfsm.h Driver IOCTLs ============= -:c:macro::`PMIC_GOTO_STANDBY` +:c:macro:`PMIC_GOTO_STANDBY` All device resources are powered down. The processor is off, and no voltage domains are energized. -:c:macro::`PMIC_GOTO_LP_STANDBY` +:c:macro:`PMIC_GOTO_LP_STANDBY` The digital and analog functions of the PMIC, which are not required to be always-on, are turned off (low-power). -:c:macro::`PMIC_UPDATE_PGM` +:c:macro:`PMIC_UPDATE_PGM` Triggers a firmware update. -:c:macro::`PMIC_SET_ACTIVE_STATE` +:c:macro:`PMIC_SET_ACTIVE_STATE` One of the operational modes. The PMICs are fully functional and supply power to all PDN loads. All voltage domains are energized in both MCU and Main processor sections. -:c:macro::`PMIC_SET_MCU_ONLY_STATE` +:c:macro:`PMIC_SET_MCU_ONLY_STATE` One of the operational modes. Only the power resources assigned to the MCU Safety Island are on. -:c:macro::`PMIC_SET_RETENTION_STATE` +:c:macro:`PMIC_SET_RETENTION_STATE` One of the operational modes. Depending on the triggers set, some DDR/GPIO voltage domains can remain energized, while all other domains are off to minimize