From: Christoph Lameter (Ampere) <cl@linux.com>
Date: Thu, 7 Dec 2023 04:11:49 +0000 (-0800)
Subject: ARM64: Convert TLB flushes of an address space
X-Git-Url: https://gentwo.org/gitweb/?a=commitdiff_plain;h=82d907900a06b191f4a12675a9b1e605110cfe02;p=linux%2F.git

ARM64: Convert TLB flushes of an address space

Use the TLB strategy infrastructure to allow the ARM64
architecture to create a number of ways to accomplish a TLB flush
for a whole address space.

Signed-off-by: Christoph Lameter (Ampere) <cl@linux.com>
---

diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index 65144b8d88d4..8f0d4b48758b 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -250,18 +250,7 @@ static inline void flush_tlb_all(void)
 	_count_vm_tlb_event(NR_TLB_FLUSH_ALL);
 }
 
-static inline void flush_tlb_mm(struct mm_struct *mm)
-{
-	unsigned long asid;
-
-	dsb(ishst);
-	asid = __TLBI_VADDR(0, ASID(mm));
-	__tlbi(aside1is, asid);
-	__tlbi_user(aside1is, asid);
-	dsb(ish);
-	mmu_notifier_arch_invalidate_secondary_tlbs(mm, 0, -1UL);
-	_count_vm_tlb_event(NR_TLB_FLUSH_ALL);
-}
+extern void flush_tlb_mm(struct mm_struct *mm);
 
 static inline void __flush_tlb_page_nosync(struct mm_struct *mm,
 					   unsigned long uaddr)
diff --git a/arch/arm64/mm/context.c b/arch/arm64/mm/context.c
index 53aefa480d82..d11213f82d8e 100644
--- a/arch/arm64/mm/context.c
+++ b/arch/arm64/mm/context.c
@@ -568,6 +568,36 @@ static inline void flush_tlb_pre(enum tlb_state ts)
 	dsb(ishst);
 }
 
+static void ipi_flush_tlb_asid(void *p)
+{
+	unsigned long asid = (unsigned long)p;
+
+	flush_tlb_pre(TLB_LOCAL);
+	flush_tlb_asid(TLB_LOCAL, asid);
+	flush_tlb_post(TLB_LOCAL);
+	count_vm_tlb_event(NR_TLB_REMOTE_FLUSH_RECEIVED);
+}
+
+void flush_tlb_mm(struct mm_struct *mm)
+{
+	unsigned long asid = __TLBI_VADDR(0, ASID(mm));
+	enum tlb_state ts = tlbstat_mm(mm);
+
+	if (ts == TLB_IPI) {
+
+		on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_asid, (void *)asid, true);
+		count_vm_tlb_event(NR_TLB_REMOTE_FLUSH);
+
+	} else {
+
+		flush_tlb_pre(ts);
+		flush_tlb_asid(ts, asid);
+		flush_tlb_post(ts);
+
+	}
+	mmu_notifier_arch_invalidate_secondary_tlbs(mm, 0, -1UL);
+}
+
 static ssize_t tlb_mode_read_file(struct file *file, char __user *user_buf,
 				size_t count, loff_t *ppos)
 {