From: Richard Genoud Date: Tue, 28 Oct 2025 07:34:59 +0000 (+0100) Subject: mtd: rawnand: sunxi: introduce reg_user_data in sunxi_nfc_caps X-Git-Url: https://gentwo.org/gitweb/?a=commitdiff_plain;h=f53c74d0577426bcf604dd2f087da812812a6538;p=linux%2F.git mtd: rawnand: sunxi: introduce reg_user_data in sunxi_nfc_caps The H6/H616 USER_DATA register is not at the same offset as the A10/A23 one, so move its offset into sunxi_nfc_caps No functional change. Signed-off-by: Richard Genoud Reviewed-by: Jernej Skrabec Signed-off-by: Miquel Raynal --- diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c index d877c20c203d..89495d786293 100644 --- a/drivers/mtd/nand/raw/sunxi_nand.c +++ b/drivers/mtd/nand/raw/sunxi_nand.c @@ -48,7 +48,8 @@ #define NFC_REG_DEBUG 0x003C #define NFC_REG_A10_ECC_ERR_CNT 0x0040 #define NFC_REG_ECC_ERR_CNT(nfc, x) ((nfc->caps->reg_ecc_err_cnt + (x)) & ~0x3) -#define NFC_REG_USER_DATA(x) (0x0050 + ((x) * 4)) +#define NFC_REG_A10_USER_DATA 0x0050 +#define NFC_REG_USER_DATA(nfc, x) (nfc->caps->reg_user_data + ((x) * 4)) #define NFC_REG_SPARE_AREA 0x00A0 #define NFC_REG_PAT_ID 0x00A4 #define NFC_REG_MDMA_ADDR 0x00C0 @@ -225,6 +226,7 @@ static inline struct sunxi_nand_chip *to_sunxi_nand(struct nand_chip *nand) * through MBUS on A23/A33 needs extra configuration. * @reg_io_data: I/O data register * @reg_ecc_err_cnt: ECC error counter register + * @reg_user_data: User data register * @dma_maxburst: DMA maxburst * @ecc_strengths: Available ECC strengths array * @nstrengths: Size of @ecc_strengths @@ -233,6 +235,7 @@ struct sunxi_nfc_caps { bool has_mdma; unsigned int reg_io_data; unsigned int reg_ecc_err_cnt; + unsigned int reg_user_data; unsigned int dma_maxburst; const u8 *ecc_strengths; unsigned int nstrengths; @@ -734,8 +737,7 @@ static void sunxi_nfc_hw_ecc_get_prot_oob_bytes(struct nand_chip *nand, u8 *oob, { struct sunxi_nfc *nfc = to_sunxi_nfc(nand->controller); - sunxi_nfc_user_data_to_buf(readl(nfc->regs + NFC_REG_USER_DATA(step)), - oob); + sunxi_nfc_user_data_to_buf(readl(nfc->regs + NFC_REG_USER_DATA(nfc, step)), oob); /* De-randomize the Bad Block Marker. */ if (bbm && (nand->options & NAND_NEED_SCRAMBLING)) @@ -757,7 +759,7 @@ static void sunxi_nfc_hw_ecc_set_prot_oob_bytes(struct nand_chip *nand, } writel(sunxi_nfc_buf_to_user_data(oob), - nfc->regs + NFC_REG_USER_DATA(step)); + nfc->regs + NFC_REG_USER_DATA(nfc, step)); } static void sunxi_nfc_hw_ecc_update_stats(struct nand_chip *nand, @@ -2192,6 +2194,7 @@ static const u8 sunxi_ecc_strengths_a10[] = { static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = { .reg_io_data = NFC_REG_A10_IO_DATA, .reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT, + .reg_user_data = NFC_REG_A10_USER_DATA, .dma_maxburst = 4, .ecc_strengths = sunxi_ecc_strengths_a10, .nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10), @@ -2201,6 +2204,7 @@ static const struct sunxi_nfc_caps sunxi_nfc_a23_caps = { .has_mdma = true, .reg_io_data = NFC_REG_A23_IO_DATA, .reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT, + .reg_user_data = NFC_REG_A10_USER_DATA, .dma_maxburst = 8, .ecc_strengths = sunxi_ecc_strengths_a10, .nstrengths = ARRAY_SIZE(sunxi_ecc_strengths_a10),